Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process.

导出 LinkOut

翻译打印收藏纠错

作者： Yongsu,Lee ^[1] ; Heejin,Kwon ^[1] ; Seung-Mo,Kim ^[1] ; Ho-In,Lee ^[1] ; Kiyung,Kim ^[1] ; Hae-Won,Lee ^[1] ; So-Young,Kim ^[1] ; Hyeon Jun,Hwang ^[2] ; Byoung Hun,Lee ^[3]

作者单位： Center for Semiconductor Technology Convergence, Department of Electrical Engineering, Pohang University of Science and Technology, Cheongam-Ro 77, Nam-Gu, Pohang, Gyeongbuk, 37673, Republic of Korea. ^[1] Center for Semiconductor Technology Convergence, Department of Electrical Engineering, Pohang University of Science and Technology, Cheongam-Ro 77, Nam-Gu, Pohang, Gyeongbuk, 37673, Republic of Korea. hhjune@postech.ac.kr. ^[2] Center for Semiconductor Technology Convergence, Department of Electrical Engineering, Pohang University of Science and Technology, Cheongam-Ro 77, Nam-Gu, Pohang, Gyeongbuk, 37673, Republic of Korea. bhlee1@postech.ac.kr. ^[3]

关键词 Organic semiconductor Photolithography Stack-channel Ternary logic Zero differential conductance

DOI 10.1186/s40580-023-00362-w

PMID 36894801

发布时间 2023-11-06

翻译满意度评价：

准确一般字义偏差语意偏离译文作用小提交

浏览0

Nano convergence

2023年10卷1期

12页

相似文献

中文期刊
外文期刊
学位论文
会议论文

检索历史清除

Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process.

Nano convergence

相似文献

Nano convergence

相关期刊

参考文献：
指定格式：	NoteExpress EndNote RefWorks NoteFirst

检索历史 清除

Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process.

Nano convergence

相似文献

Nano convergence

相关期刊

检索历史清除