A Cross-Scale Electrothermal Co-Simulation Approach for Power MOSFETs at Device-Package-Heatsink-Board Levels.

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第一作者： Yuxuan,Dai

第一单位： College of Integrated Circuit Science and Engineering, Nanjing University of Posts and Telecommunications, Nanjing 210023, China.;National & Local Joint Engineering Laboratory for RF Integration and Micro-Packaging Technologies, Nanjing University of Posts and Telecommunications, Nanjing 210023, China.

作者： Yuxuan,Dai ^[1] ; Jiafei,Yao ^[1] ; Jing,Chen ^[1] ; Qingyou,Qian ^[2] ; Maolin,Zhang ^[1] ; Jun,Zhang ^[1] ; Qing,Yao ^[1] ; Chenyang,Huang ^[1] ; Mingshun,Sun ^[2] ; Yufeng,Guo ^[1]

作者单位： College of Integrated Circuit Science and Engineering, Nanjing University of Posts and Telecommunications, Nanjing 210023, China.;National & Local Joint Engineering Laboratory for RF Integration and Micro-Packaging Technologies, Nanjing University of Posts and Telecommunications, Nanjing 210023, China. ^[1] JIEJIE Microelectronics Co., Ltd., Nantong 226200, China. ^[2]

关键词 chip temperature device–package–heatsink–board level drain current electrothermal co-simulation power MOSFETs

DOI 10.3390/mi15111336

PMID 39597148

发布时间 2024-11-30

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2024年15卷11期

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A Cross-Scale Electrothermal Co-Simulation Approach for Power MOSFETs at Device-Package-Heatsink-Board Levels.

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A Cross-Scale Electrothermal Co-Simulation Approach for Power MOSFETs at Device-Package-Heatsink-Board Levels.

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