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A Scalable 1024-Channel Ultra-Low-Power Spike Sorting Chip with Event-Driven Detection and Spatial Clustering.

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第一作者： Arash,Akhoundi

第一单位： Electrical Engineering, University of Tehran, Sharif University of Technology; Department of Microelectronics, Delft University of Technology.

作者： Arash,Akhoundi ^[1] ; Pumiao,Yan ^[2] ; Yawende,Landbrug ^[3] ; Madeline,Hays ^[4] ; Boris,Murmann ^[5] ; E J,Chichilnisky ^[6] ; Dante G,Muratore ^[7]

作者单位： Electrical Engineering, University of Tehran, Sharif University of Technology; Department of Microelectronics, Delft University of Technology. ^[1] Electrical and Computer Engineering, Cornell University; Electrical Engineering, Stanford University. ^[2] Biomedical Engineering (TU Delft) and Neuroscience (Erasmus University Rotterdam); Erasmus MC, TU Delft and Stanford University. ^[3] Bioengineering-electrical engineering, Stanford Artificial Retina Project. ^[4] Communications engineering, Fachhochschule Dieburg, Dieburg, Germany; Electrical engineering, Santa Clara University, Santa Clara, CA, USA; Electrical engineering, University of California, Berkeley, CA, USA. ^[5] Neurosurgery and Ophthalmology, Stanford University. ^[6] Electrical Engineering, Politecnico of Torino; Microelectronics, Integrated Microsystems Laboratory, University of Pavia; Department of Microelectronics, Delft University of Technology. ^[7]

关键词 Brain-computer interfaces event-driven spike detection high-density neural interface neural signal compression neural signal processor on-chip spike sorting

DOI 10.1109/jssc.2025.3611139

PMID 41357676

发布时间 2025-12-10

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